Field
The present invention relates to a high-frequency circuit.
Background
There are disclosures of connection to independent interconnections using wires for second harmonic matching in a high-frequency circuit (see, for example, Japanese Patent Application Publication No. 2013-118580). There are disclosures of adjusting transmission phases by changing wire lengths without changing contact points of wires and of extending interconnections at both ends of a transistor (see, for example, Japanese Patent Application Publication No. 2015-15496). There are disclosures of techniques for adjusting transmission phase differences by changing the lengths or heights of wires (see, for example, Japanese Patent Application Publication No. 2008-300685). Further, there are disclosures of wire bonding to vertical surfaces (see, for example, Japanese Patent Application Publication Nos. S63-44733, H10-82930, 2006-228948, and 2011-146708), but such disclosures are unrelated to transmission phase adjustment.
A plurality of gate electrodes of a transistor form a row at 90° with respect to the signal propagation direction. The electrical length from an input to a gate electrode in a central portion of the transistor is short, and the electrical length from the input to a gate electrode in a peripheral portion of the transistor is long. Accordingly, if the transistor has many gate electrodes, signal transmission phases differ between the central portion and the peripheral portion of the transistor. This causes the position dependence of the operation of each unit transistor within the transistor and interferes with ideal operation of the transistor.
Internally-matched high-frequency circuits in which transistors are combined in parallel also have a difference in signal propagation distances between a central portion and a peripheral portion. Generally, the central portion is influenced by a coupling between lines, and the electrical length in the central portion tends to be shorter than that in the peripheral portion. Accordingly, the position dependence of the operation of each of the transistors arranged in parallel occurs, and ideal signal distribution and synthesis cannot be performed.